Memory read circuit with dynamically controlled precharging devi

Details Memory read circuit with dynamically controlled precharging devi Memory read circuit with dynamically controlled precharging devi

1998-04-13

2000-03-14

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

36518507, 3651852, 36518909, G11C 1606

Patent

active

060381736

ABSTRACT:
A memory read circuit includes a dynamically controlled precharging device that can be applied in the field of non-volatile (EEPROM, Flash EPROM) memories. The precharging circuit interrupts the precharging of the bit line and the reference line when the potential of the these lines reaches a boundary value referenced with respect to ground.

REFERENCES:
patent: 4370737 (1983-01-01), Chan
patent: 4725984 (1988-02-01), Ip et al.
patent: 5083047 (1992-01-01), Horie et al.
patent: 5432746 (1995-07-01), Guedj
patent: 5563826 (1996-10-01), Pascucci et al.
patent: 5859798 (1999-01-01), Yero

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