1994-08-03
1996-10-08
Kriess, Kevin A.
395490, G06F 1214
Patent
active
055640362
ABSTRACT:
A memory protective circuit comprising a RAM. An area of the RAM where any writing is inhibited is designated. When there are instructions to write into the area where any writing is inhibited, writing into the area is prevented.
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Canon Kabushiki Kaisha
Kriess Kevin A.
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