Memory power management systems and methods

Details Memory power management systems and methods Memory power management systems and methods

2011-06-14

2011-06-14

Nguyen, VanThu (Department: 2824)

Static information storage and retrieval

Powering

Conservation of power

C365S226000, C365S228000, C365S229000

Reexamination Certificate

active

07961546

ABSTRACT:
Memory power management systems and methods are provided. One embodiment of the present invention includes a memory power management system. The system comprises a first low dropout (LDO) regulator that provides an active operating voltage that is derived from a first supply voltage to power a memory array during an active mode. The system further comprises a second LDO regulator that provides a minimum memory retention voltage that is derived from a second supply voltage to power the memory array in a standby mode, wherein the second supply voltage also powers at least one peripheral circuit for reading from and/or writing to the memory array.

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