Memory module with hierarchical functionality

Details Memory module with hierarchical functionality Memory module with hierarchical functionality

2006-07-25

2006-07-25

Tran, Andrew Q. (Department: 2824)

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

C365S208000, C365S194000, C365S227000, C365S233100

Reexamination Certificate

active

07082076

ABSTRACT:
A hierarchical memory structure having memory cells, and sense amplifiers and decoders coupled with the memory cells to form first tier memory module, and subsequent tiers being formed by having (n−1)-tier memory modules, which are coupled with (n)-tier sense amplifiers and (n)-tier decoders. Also provided are a single-ended sense amplifier having sample-and-hold reference, and a charge-share limited-swing-driver sense amplifier; an asynchronously-resettable decoder; a wordline decoder having row redundancy; a redundancy device having redundant memory cells operated by a redundancy controller; a diffusion replica delay circuit; a high-precision delay measurement circuit; and a data transfer bus circuit imposing a limited voltage swing on a data bus. Methods are provided for a write-after-read operation without an interposed precharge cycle, and write-after-write operation with an interposed precharge cycle are provided, either operation being completed in less than one memory access cycle.

REFERENCES:
patent: 4984202 (1991-01-01), Kawahara et al.
patent: 5170375 (1992-12-01), Mattausch et al.
patent: 5247479 (1993-09-01), Young
patent: 5734616 (1998-03-01), Kazama et al.
patent: 5751648 (1998-05-01), Braceras et al.
patent: 5752264 (1998-05-01), Blake et al.
patent: 5781498 (1998-07-01), Suh
patent: 5864497 (1999-01-01), Suh
patent: 6009024 (1999-12-01), Hirata et al.
patent: 6040999 (2000-03-01), Hotta et al.
patent: 6141286 (2000-10-01), Vo et al.
patent: 6141287 (2000-10-01), Mattausch
patent: 6144604 (2000-11-01), Haller et al.
patent: 6154413 (2000-11-01), Longwell et al.
patent: 6163495 (2000-12-01), Ford et al.
patent: 6166942 (2000-12-01), Vo et al.
patent: 6166986 (2000-12-01), Kim
patent: 6166989 (2000-12-01), Hamamoto et al.
patent: 6169701 (2001-01-01), Eto et al.
patent: 6173379 (2001-01-01), Poplingher et al.
patent: 6611465 (2003-08-01), Terzioglu et al.
patent: 6618302 (2003-09-01), Terzioglu et al.
patent: 6894231 (2005-05-01), Winograd et al.
patent: 6937538 (2005-08-01), Terzioglu et al.
patent: 0745 955 (1996-12-01), None
patent: 0 974 978 (2000-01-01), None
patent: 10-134573 (1998-05-01), None
K. Itoh, et al., “Trends in Low-power RAM Circuit Technologies,” Proceedings of the IEEE, vol. 83, No. 4, Apr. 1995, pp. 524-543.

Affiliated with

Also associated with

Rating

Memory module with hierarchical functionality does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory module with hierarchical functionality, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory module with hierarchical functionality will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3547218