Memory module and memory device

Details Memory module and memory device Memory module and memory device

2007-12-31

2009-06-16

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Format or disposition of elements

C365S063000, C365S236000, C257S686000

Reexamination Certificate

active

07548444

ABSTRACT:
In a memory module including a plurality of DRAM chips which transmit/receive a system data signal with a predetermined data width and at a transfer rate and which transmit/receive an internal data signal having a larger data width and a lower transfer rate as compared with the system data signal, the transfer rate of the system data signal is restricted. Current consumption in DRAMs constituting the memory module is large, hindering speed increases. For this memory module, a plurality of DRAM chips are stacked on an IO chip. Each DRAM chip is connected to the IO chip by a through electrode, and includes a constitution for mutually converting the system data signal and the internal data signal in each DRAM chip by the IO chip. Therefore, wiring between the DRAM chips can be shortened, and DLL having a large current consumption may be disposed only on the IO chip.

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Japanese Patent office issued a Japanese Office Action on Dec. 17, 2008, Application No. 2003-115834.

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