Memory module

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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Details

C361S719000, C361S721000, C361S689000

Reexamination Certificate

active

06381140

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a memory module, more particularly to a memory module that enables fast signal transmission speeds, that has a relatively small printed circuit board height requirement, and that can be implemented at a relatively low cost.
2. Description of the Related Art
Memory devices are important components of a personal computer. Aside from their use in the storage of computer software applications, memory devices are also used for storing data of files that are being processed by the computer.
As the processing speeds of central processing units on computer main boards increase, the timing cycles of peripheral devices, such as bus timing cycles, must be increased accordingly for efficient operation of the entire computer system. During operation, the operating efficiency is affected by the access speed of memory modules when transferring or processing large blocks of data. Thus, in the PC100 standard set by manufacturers, the response time of memory devices must be at least less than 8 ns to ensure stable operation of a computer system that uses a central processing unit with a processing speed of at least 100 MHz.
Referring to
FIG. 1
, a conventional memory module is shown to include a printed circuit board
1
having opposite sides
11
,
12
, and a plurality of memory chips
10
. Each side
11
,
12
of the printed circuit board
1
has a lower chip mounting portion
14
, an upper chip mounting portion
15
, and signal traces
13
that extend from a mounting edge of the printed circuit board
1
to the lower and upper chip mounting portions
14
,
15
. The memory chips
10
are mounted on the opposite sides
11
,
12
of the printed circuit board
1
at the lower and upper chip mounting portions
14
,
15
. As shown in
FIG. 2
, since the memory chips
10
on the upper chip mounting portion
15
are disposed farther from the mounting edge of the printed circuit board
1
than those on the lower chip mounting portion
14
, a time delay normally results. In general, the time delay associated with a transmission distance of one inch is about 200 ps. Since the range of time delay that can be accommodated by a central processing unit is usually less than 1 ns, a relatively long time delay generated by a memory module will have an adverse effect on the operation of the central processing unit.
Furthermore, with reference to
FIG. 3
, when the conventional memory module is mounted on an electrical connector
2
, because the memory chips
10
are arranged in lower and upper rows on the lower and upper chip mounting portions
14
,
15
of the printed circuit board
1
, the conventional memory module has a relatively large printed circuit board height requirement, thereby resulting in a corresponding increase in the height requirement of the housing of the computer to which the memory module is applied. This increase in the height requirement of the computer housing is detrimental when the computer is a notebook computer.
While stacked memory modules have been proposed heretofore to overcome the aforesaid drawback associated with time delay, they are costly to implement.
SUMMARY OF THE INVENTION
Therefore, the object of the present invention is to provide a memory module that enables fast signal transmission speeds, that has a relatively small printed circuit board height requirement, and that can be implemented at a relatively low cost.
According to the present invention, a memory module comprises: parallel first and second printed circuit boards, each having a mounting edge, a chip mounting side with a set of memory chips mounted thereon, and signal traces that extend from the mounting edge and that are connected to the set of memory chips on the chip mounting side; and a signal conductor unit that is disposed between the first and second printed circuit boards and that interconnects the signal traces on the first and second printed circuit boards.
In the preferred embodiment, the signal conductor unit includes a plurality of conductive pins that extend transversely between the first and second printed circuit boards and that connect a respective one of the signal traces on the first printed circuit board to a respective one of the signal traces on the second printed circuit board. The conductive pins space apart the first and second printed circuit boards. The memory chips on the chip mounting side are arranged in a single row, and the signal traces on the first and second printed circuit boards are identical.


REFERENCES:
patent: 5117282 (1992-05-01), Salatino
patent: 5191404 (1993-03-01), Wu et al.
patent: 5224023 (1993-06-01), Smith et al.
patent: 5754409 (1998-05-01), Smith
patent: 5949657 (1999-09-01), Karabatsos
patent: 6021048 (2000-02-01), Smith
patent: 6147870 (2000-11-01), Pommer

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