Memory module

Details Memory module Memory module

2002-03-13

2004-04-13

Martin, David (Department: 2841)

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

C361S760000, C361S748000, C361S730000, C361S785000, C439S074000, C439S067000, C174S254000

Reexamination Certificate

active

06721189

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to memory modules, and in particular a memory module that connects circuit boards via an area array.
2. Description of Related Art
The semiconductor industry is constantly producing smaller and more complex semiconductors, sometimes called integrated circuits or chips. This trend has brought about the need for smaller semiconductor chip packages with smaller footprints, higher lead counts, and better electrical and thermal performance, while at the same time meeting accepted reliability standards.
In complex microelectronic devices, different semiconductor components connect to one another through various types of connectors. The reliability of these connectors is critical to the proper functioning of these microelectronic devices. However, as such microelectronic devices become smaller and more complex, the density of input and output electrical contacts on the devices increases. This means that the pitch or space between such contacts is continually decreasing. For example, semiconductor chips today contain up to 2000 pins per square inch, requiring a pitch as small as 0.003 inches.
In addition, as the number of pins on semiconductor chips increases, the number of contacts on the circuit boards carrying these semiconductor chips also increases. Therefore, today's circuit board connectors need to have a high density of contacts with a small pitch. However, it becomes increasingly more difficult for reliable contact to be made, as pitch decreases.
There are common situations where it is desirable to connect two circuit boards to one another. For example, it may be desirable to couple a circuit board of a memory module to a target board, such as a motherboard. Such memory modules include Dual In-line Memory Modules (DIMMs), Single In-line Memory Modules (SIMMs), RAMBUS In-line Memory Modules (RIMMs), or the like. Typically, these memory modules connect to a target board via a male card edge connector that mates with a female card edge connector or socket on the target board.
FIG. 1A
is a front view of such a prior art memory module
100
including a male card edge connector
103
and its corresponding female card edge connector or socket
104
on a target board
106
. The edge card connector
103
includes a set of pins or contact pads
102
located along an edge of a memory module
100
. These contact pads
102
electrically engage with corresponding contacts in the socket
104
, which is soldered onto a target board
106
. Each memory module
100
typically includes of a number of memory chips
101
.
FIG. 1B
is a side view of the prior art memory module
100
shown in
FIG. 1A. A
disadvantage of such a male card edge connector
103
is that the number of contact pads
102
that can be placed along the edge of the memory module
100
is very limited. As the demand for memory capacity increases, so does the number of semiconductor chips
101
required per memory module
100
. This increase in the number of semiconductor chips
101
leads to an increase in the number and density of contact pads
102
on the memory modules
100
.
As the density of the contact pads
102
increases, it becomes more difficult to provide reliable electrical contact due to inherent surface irregularities on the circuit board and contact pads. These surface irregularities may prevent some of the contact pads from making contact with corresponding contacts in the socket
104
. Additionally, interference, such as electrical fields, generated between contact pads limit how close contact pads may be placed to one another. Additionally, these female card edge type connectors or sockets occupy a relatively large footprint on the target board and also substantially increasing the height of the target board. In light of the above, card edge connectors are becoming increasingly undesirable in today's ever shrinking microelectronics devices.
Another way of packaging microelectronic devices, in order to achieve higher counts of input and output electrical contacts, is by employing area arrays. An area array
202
, shown in
FIG. 2A
, comprises a group of contact pads
200
arranged in a matrix on a circuit board
201
. Area arrays
202
allow connectors to have more contacts spaced sufficiently far away from one another to avoid the drawbacks associated with card edge connectors.
Connectors such as DELPHI CONNECTION SYSTEMS' GOLD DOT connector utilize area arrays to connect circuit boards to each other.
FIG. 2B
shows a side view and
FIG. 2C
shows a front view of such a prior art GOLD DOT connector
205
, as viewed along arrow
2
C of FIG.
2
B. The GOLD DOT connector
205
comprises two sets of gold plated pins or “dots”
204
(
1
) and
204
(
2
) contained on a flexible circuit board
203
. The flexible circuit board is usually shaped by mounting on a block
212
or a bracket so as to create a rigid connection between a circuit board
208
and a target board
206
. Pins
204
(
1
) to
204
(
2
) make contact with the contact pads
210
(
1
) and
210
(
2
) located in area arrays on the circuit board
208
and the target board
206
, respectively. The boards
206
and
208
are kept in contact with the GOLD DOT connector
205
by clamping each of the boards
206
and
208
to the GOLD DOT connector using two separate clamps (not shown).
A disadvantage of this type of connector is the high number of contact “dots” that comprise the two sets of pins
204
(
1
) and
204
(
2
). The additional contact points increase the likelihood of inadequate electrical connections being formed. Also, because GOLD DOTs currently cost up to $0.02/dot, the GOLD DOT connectors make large arrays prohibitively expensive. Another drawback of the GOLD DOT connector is the use of two separate clamps, which increases the cost and size of the connector arrangement.
In view of the foregoing, it would be highly desirable to provide an electrical connector that addresses the abovementioned drawbacks, while providing connector that is reliable at a low associated cost per electrical connector.


REFERENCES:
patent: 5936850 (1999-08-01), Takahashi et al.
patent: 5949657 (1999-09-01), Karabatsos
patent: 6520789 (2003-02-01), Daugherty et al.
patent: 6532157 (2003-03-01), Glenn et al.
patent: 6618938 (2003-09-01), Alagaratnam et al.

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