Static information storage and retrieval – Interconnection arrangements
Patent
1992-12-21
1994-06-07
LaRoche, Eugene R.
Static information storage and retrieval
Interconnection arrangements
365 51, G11C 506
Patent
active
053195914
ABSTRACT:
A memory module includes a substrate having a common address line and first and second separate voltage lines. The substrate additionally has first and second voltage terminals which are maintained at a first predetermined potential and which are respectively connected to the first and second separate voltage lines. First and second memory devices are mounted on the substrate. The first memory device has a first data lead terminal, a first control input lead terminal, a first address input lead terminal and a first voltage lead terminal, the first address input lead terminal being connected to the common address line and the first voltage lead terminal being connected to the first separate voltage line. The second memory device has a second data lead terminal, a second control input lead terminal, a second address input lead terminal and a second voltage lead terminal, the second address input lead terminal being connected to the common address line and the second voltage lead terminal being connected to the second separate voltage line.
REFERENCES:
patent: 4656605 (1987-04-01), Clayton
patent: 5040143 (1991-06-01), Matsumura
patent: 5144578 (1992-09-01), Sakagami
patent: 5164916 (1992-11-01), Wu
"Memory Module (Oki Semiconductor)", Oki Electric Industry Co., Ltd., First Edition, Jul. 1990, pp. 108-119 and pp. 165-173.
Takeda Takashi
Ushida Youichi
LaRoche Eugene R.
OKI Electric Industry Co., Ltd.
Zarabian A.
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