Memory modification system

Details Memory modification system Memory modification system

1976-02-23

1977-06-28

Atkinson, Charles E.

Registers

Transfer mechanism

Traveling pawl

340173BB, G11C 2900, G06F 1100

Patent

active

040327655

ABSTRACT:
A system for modifying the output of individual bits of a fixed memory such as a ROM. Means are provided for recognizing the address of bit-locations requiring modification. The recognized addresses are organized into (a) those requiring the addition of a logic 1 bit or (b) those requiring deletion of a logic 1 bit. An output-data control package combines this information logically with the data bit existing in memory to provide a corrected data output bit on the required line of the ROM output bus. The system is also adaptable to "Word-oriented" ROM's such that an improper word in memory may be modified to provide a corrected output word from the ROM.

REFERENCES:
patent: 3422402 (1969-01-01), Sakalay
patent: 3588830 (1971-06-01), Duda et al.
patent: 3659275 (1972-04-01), Marshall
patent: 3753244 (1974-08-01), Sumilas et al.
patent: 3768071 (1973-10-01), Knauft et al.
patent: 3898443 (1975-08-01), Smith
patent: 3934227 (1976-01-01), Worst
Houdek, Read-Only Patch Card, IBM Tech. Disclosure Bulletin, vol. 17, No. 6, Nov. 1974, pp. 1742-1743.

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