Memory map computer control system for programmable ICS

Details Memory map computer control system for programmable ICS Memory map computer control system for programmable ICS

1997-04-04

2000-09-12

Teska, Kevin J.

39550018, 39550002, G06F 1700

Patent

active

061189383

ABSTRACT:
A table-based computer user interface and a method of providing design parameters are provided for configuring circuits for programmable ICs. A design database describing a circuit is displayed in table-based format on a computer screen display. The design database may include a memory map including data to be placed in bit-storage space in the target programmable IC. This design database requires no schematics or HDL description of the circuit, even for application-specific circuits and other complicated circuits. The desired parameters are entered by the user, typically using toggle buttons, pull-down menus, or keyboard entry. The selected parameters and memory map data are then entered into the design database, thereby configuring the design database in accordance with the selected parameters. In one embodiment, the user interface can also be used to display read data from a previously programmed programmable IC.

REFERENCES:
patent: 4162536 (1979-07-01), Morley
patent: 5109353 (1992-04-01), Sample et al.
patent: 5544222 (1996-08-01), Robinson et al.
patent: 5557748 (1996-09-01), Norris
patent: 5574930 (1996-11-01), Halverson, Jr. et al.
patent: 5603043 (1997-02-01), Taylor et al.
patent: 5608876 (1997-03-01), Cohen et al.
patent: 5673198 (1997-09-01), Lawman et al.
patent: 5684980 (1997-11-01), Casselman
patent: 5752006 (1998-05-01), Baxter
patent: 5754766 (1998-05-01), Shaw et al.
patent: 5761484 (1998-06-01), Agarwal et al.
patent: 5802290 (1998-09-01), Casselman
patent: 5864486 (1999-01-01), Deming et al.
patent: 5898595 (1999-04-01), Bair et al.
Condor Technical Summary, by Allan Bricker, Michael Litzkow and Miron Livny, Jan. 28, 1992. (10 pages).
Xilinx, Inc., "The Programmable Logic Data Book," 1996, pp. 4-11 through 4-23.
Geber et al "Peripheral Component Interconnect (PCI) Interface with the QuickLogic QL 16x24B FPGA," IEEE, pp. 568-573, Sep. 1994.

Affiliated with

Also associated with

Rating

Memory map computer control system for programmable ICS does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory map computer control system for programmable ICS, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory map computer control system for programmable ICS will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-103942