Memory management unit for addressing an expanded memory in grou

Details Memory management unit for addressing an expanded memory in grou Memory management unit for addressing an expanded memory in grou

1986-01-02

1988-08-02

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 1206

Patent

active

047617365

ABSTRACT:
A n-channel memory management circuit operates as an interface unit between a microprocessor, which microprocessor is normally capable of addressing only 64K bytes of memory, to provide expandable memory configurations with a memory capacity of at least 128K bytes of read only memory (ROM) and 128K bytes of random access memory (RAM) which are directly accessed by the microprocessor in 64K bytes blocks or "windows" consisting of smaller size non-contiguous blocks from the entire memory configuration.

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patent: 4403283 (1983-09-01), Myntti et al.
patent: 4443847 (1984-04-01), Bradley et al.
patent: 4481570 (1984-11-01), Wiker
patent: 4511964 (1985-04-01), Georg et al.
patent: 4519032 (1985-05-01), Mendell
patent: 4613953 (1986-09-01), Bush et al.

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