Boots – shoes – and leggings
Patent
1990-01-22
1993-03-09
Lee, Thomas C.
Boots, shoes, and leggings
364DIG1, 3642434, 364246, 36424612, 3642463, 3642543, 3642813, 395650, G06F 1206, G06F 1208
Patent
active
051931729
ABSTRACT:
An information processing system managing a virtual memory by using a real memory system comprising a single or a plurality of processors which, when a real page allocation request occurs in a processor or task keeping the use priority that the real pages of a group among the divided groups of the real pages of said memory can be used in a priority basis, allocated the real pages belonging to said group for which said processor or task keeps the use priority to said processor or task in a priority basis so as to decrease the cache cancel rate and the mapping fault occurrence rate and to allow for smoothing and high speed access of the main memory.
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Arai Toshiaki
Nagasuka Hirohumi
Ohfusa Yoshitaka
Yoshizawa Yasufumi
Hitachi , Ltd.
Lee Thomas C.
Lim Krisna
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