Memory management system

Static information storage and retrieval – Addressing – Counting

Patent

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Details

365230, 364200, 364900, G11C 800, G11C 906

Patent

active

045286485

ABSTRACT:
A unique memory management system for use with a memory device which is common (or shared) with a plurality of user elements utilizing a memory address counter, scratch pad address memory, external memory address inputs and an address multiplexer.

REFERENCES:
patent: 3911404 (1975-10-01), Oneill, Jr.
patent: 3990054 (1976-11-01), Perlowski
patent: 4042972 (1977-08-01), Gruner et al.
patent: 4129901 (1978-12-01), Masuda
patent: 4393482 (1983-07-01), Yamada
patent: 4394753 (1983-07-01), Penzel
Waldecker, "Memory Error Correction", IBM Technical Disclosure Bulletin, vol. 13, No. 1, Jun. 1970, pp. 52-53.

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