Memory management for an MPEG2 compliant decoder

Details Memory management for an MPEG2 compliant decoder Memory management for an MPEG2 compliant decoder

1996-03-19

1997-09-16

Chin, Tommy P.

Television

Bandwidth reduction system

Data rate reduction

348409, 348415, 348416, H04N 712

Patent

active

056685998

ABSTRACT:
Disclosed is a digital signal decoder system for receiving compressed encoded digitized video signals and transmitting decompressed decoded digital video signals. This is accomplished with a minimum of DRAM demand through the use of a Spill Buffer.

REFERENCES:
patent: 5014265 (1991-05-01), Hahne et al.
patent: 5134477 (1992-07-01), Knauer et al.
patent: 5220425 (1993-06-01), Enari et al.
patent: 5278647 (1994-01-01), Hingorani et al.
patent: 5293229 (1994-03-01), Iu
patent: 5317397 (1994-05-01), Odaka et al.
patent: 5361097 (1994-11-01), Kolczynski
patent: 5386234 (1995-01-01), Veltman et al.
patent: 5398072 (1995-03-01), Auld
patent: 5410354 (1995-04-01), Uz
patent: 5461679 (1995-10-01), Normile et al.
patent: 5534928 (1996-07-01), Iwamura

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