Memory interface

Details Memory interface Memory interface

1993-03-30

1996-06-11

Teska, Kevin J.

Boots, shoes, and leggings

395427, 395415, 395166, 3642384, G06F 1210, G06F 3023

Patent

active

055265022

ABSTRACT:
A memory interface device capable of memory accessing suitable for video image signal processing and memory accessing designating an arbitrary address. The interface includes an input scrambler for rewriting the generation number of an input data packet utilizing first data and/or second data when the instruction code of the input data packet is a table conversion instruction, and otherwise outputting the input data packet as it is, and a memory accessing circuit accessing an image memory using the generation number of the applied input data packet as an address and outputting the result of accessing. The device produces and outputs an output data packet from the result of accessing output from the memory accessing circuit and the input data packet.

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An Evaluation of Parallel Processing in the Dynamic Data Driven Processor (Japanese Society of Information Processing Engineers of Japan, Microcomputer Architecture Symposium, Nov. 12, 1991).

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