Boots – shoes – and leggings
Patent
1996-04-30
1998-09-15
Voeltz, Emanuel Todd
Boots, shoes, and leggings
364489, 364490, G06F 1750
Patent
active
058089004
ABSTRACT:
A semiconductor memory layout definition for connection to a power supply bus in an integrated circuit layout pattern. The layout definition includes an outline and a plurality of power supply conductor segments within the outline. At least one of the power supply conductor segments has a direct strap identifier which indicates a desired attachment to the power supply bus. The direct strap identifier is passed to a routing design tool which routes a direct strap conductor from the power supply bus to the power supply conductor segments having the direct strap identifier.
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Buer Myron
LeClair Kevin R.
Liang Mike T.
Sabada Sudhakar
Kik Phallaka
LSI Logic Corporation
Todd Voeltz Emanuel
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