Memory having concurrent read and writing from different address

Boots – shoes – and leggings

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364DIG1, 3642436, 3642542, G06F 1206

Patent

active

054209978

ABSTRACT:
A random access memory (RAM) complex that can concurrently read and write to different addresses. The memory complex includes two RAMs, each having an address selector, includes a data out multiplexer for selecting outputs from one of the RAM's. A tag array stores an array of tag, one for each address in the RAM's. The tag marks which one of the two RAM's has the valid data for the corresponding read address. During a concurrent read and write cycle, the tag selects the read address for one RAM, selects the write address for the other RAM and a staged copy of the tag controls the multiplexer to select data from the correct RAM for the data out.

REFERENCES:
patent: 4599708 (1986-07-01), Schuster
patent: 4734850 (1988-03-01), Torii
patent: 4980817 (1990-12-01), Fossum et al.
patent: 5001665 (1991-03-01), Gergen et al.
patent: 5179689 (1993-01-01), Leach et al.

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