Memory gate for error sampler

Details Memory gate for error sampler Memory gate for error sampler

1986-04-14

1987-04-21

Zazworsky, John

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307359, 307572, H03K 1716, G11C 2702

Patent

active

046599460

ABSTRACT:
A memory gate for an error sampler comprises a memory capacitor having one terminal connected to a reference potential level. A current steering network has an input terminal at which it receives signal current and also has an output terminal connected to the other terminal of the memory capacitor. The current steering network either directs current received at its input terminal to its output terminal or diverts the current from the output terminal, depending on the relationship between the potential at a control terminal of the current steering network and the potential at the output terminal of the current steering network. The potential at the control terminal is biased to follow the potential at the output terminal of the current steering network, and therefore the amount by which the potential at the control terminal must be changed in order to change the state of the current steering network is independent of the voltage on the memory capacitor. A switch circuit is responsive to a gate control signal to place the current steering network in one or other of its states.

REFERENCES:
patent: 3309618 (1967-03-01), Harris et al.
patent: 3480795 (1969-11-01), Benson et al.

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