Communications: electrical – Digital comparator systems
Patent
1975-03-24
1976-07-20
Zache, Raulfe B.
Communications: electrical
Digital comparator systems
G06F 920
Patent
active
039709990
ABSTRACT:
This invention addresses large memories in a computer through the use of translation tables, associated control circuitry, and an appropriate set of instructions. A portion of the memory address bits from the processor are used to address registers in translation tables. The output of the selected translation table register is appended to the remaining memory address bits (those not used to address the translation table) to form the expanded memory address. Data may be loaded into or read from the memory area selected by one translation table by a program being executed in a memory area selected by another translation table. Also, a user may execute a subroutine in a memory area selected by one translation table and then return to his main program in a memory area selected by another translation table. Memory is seen by the computer as a set of logical pages. Each translation table has a register corresponding to each logical page, starting with the lowest logical page which is called the base page. A fence register is used to partition the logical base page addresses of memory to provide a common area of physical memory accessible by every user. The logical addresses of the base page which address the common area of physical memory are transferred from the computer directly to memory regardless of the translation table base page register contents. Addresses other than those addressing the common area of physical memory are translated through the translation tables. Protection of any memory page from being loaded into or read from is provided through the use of protection bits in the translation tables registers.
REFERENCES:
patent: 3533075 (1970-10-01), Johnson et al.
Boone David A.
Hewlett--Packard Company
LaRiviere F. D.
Zache Raulfe B.
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