Static information storage and retrieval – Powering – Conservation of power
Reexamination Certificate
2000-09-11
2001-07-03
Mai, Son (Department: 2818)
Static information storage and retrieval
Powering
Conservation of power
C365S222000, C365S228000
Reexamination Certificate
active
06256252
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device, and more particularly, it relates to a semiconductor integrated circuit device having a memory circuit and a logic circuit integrated on the same semiconductor substrate. More specifically, the present invention relates to a structure for reducing power consumption in a memory-embedded semiconductor integrated circuit device.
2. Description of the Background Art
A system LSI or a memory-embedded LSI formed by integrating a logic circuit and a memory circuit on the same semiconductor substrate is widely employed. In the memory-embedded LSI, the logic circuit and the memory circuit are interconnected with each other through internal interconnection lines on the semiconductor substrate. The internal interconnection line has a smaller load as compared with an onboard wire, and can transmit signals/data at a high speed with low power consumption. The internal interconnection line provided on the semiconductor substrate is not influenced by pitch condition on a pin terminal, and hence the bit width of data between the logic circuit and the memory circuit can be increased to increase the bandwidth in data transmission.
The gate scale of such a memory-embedded LSI is increased in the trend of system integration for implementing a high-functional system with a small area. Further, improvement of the performance of the memory-embedded LSI is attained by reducing a power supply voltage for reducing power consumption and increasing the processing speed.
When the number of gates (number of transistors) of a logic LSI is increased, the total subthreshold current of the transistors is generally increased to disadvantageously increase power consumption in a standby state.
In order to implement a high-speed operation under a low power supply voltage, the absolute values Vth of the threshold voltages of the transistors must be reduced. When the absolute values Vth of the threshold voltages are reduced, however, the subthreshold current is increased to disadvantageously increase power consumption in the standby state.
When the memory-embedded LSI is applied to a portable equipments, the life of a battery serving as a driving power source is reduced due to power consumption increased in the standby state.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor integrated circuit device capable of reducing power consumption in a standby state.
Another object of the present invention is to provide a memory-embedded LSI capable of operating at a high speed with low current consumption under a low power supply voltage.
A specific object of the present invention is to provide a memory-embedded LSI capable of remarkably reducing a standby current.
The semiconductor integrated circuit device according to the present invention includes a logic circuit performing prescribed processing, a memory circuit for storing data used in the logic circuit, a data save circuit for transferring data of the logic circuit to the memory circuit and making the memory circuit store the transferred data in a specific operation mode, and a power source for stopping supply of a power supply voltage to the logic circuit in the specific operation mode.
Supply of the power supply voltage to the logic circuit can be stopped by saving the data held in the logic circuit into the memory circuit and holding the data in the memory circuit in the specific operation mode, thereby reducing the subthreshold current in the logic circuit. Thus, the absolute values of the threshold voltages of MOS transistors forming the logic circuit can be reduced, the semiconductor integrated circuit device can operate at a high speed under a low power supply voltage, and current consumption resulting from a leakage current can be reduced in the standby state.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 4963769 (1990-10-01), Hiltpold et al.
patent: 5140557 (1992-08-01), Yoshida
patent: 5262999 (1993-11-01), Etoh et al.
patent: 6134171 (2000-10-01), Yamagata et al.
patent: 8-234877 (1996-09-01), None
patent: 10-228774 (1998-08-01), None
Mai Son
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
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