Memory efficient time de-interleave, de-puncture and viterbi dec

Pulse or digital communications – Receivers – Particular pulse demodulator or detector

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371 43, H03D 100

Patent

active

059433710

ABSTRACT:
A memory efficient time de-interleave, de-puncture and viterbi decoder circuit is provided for decoding frames of digital data that is time interleaved over a plurality of data frames, wherein the time interleaved digital data includes convolutionally encoded data. The circuit includes a time de-interleave block having an input receiving a stream of the digital data and an output connected to an input of a de-puncture block, which has an output connected to an input of a viterbi decoder block. The time de-interleave block is adapted for communication with an external memory wherein the time de-interleave block establishes a plurality of address pointers thereto corresponding to the plurality of time interleaved data frames. In accordance with the address pointers, the time de-interleave circuit stores the viterbi metric data for a number of data frames within the external memory in a storage efficient manner. The viterbi decoder circuit preferably utilizes a Radix-4 in-place decoding algorithm and a three bank trellis trace back algorithm that defines a memory efficient three bank reusable circular buffer arrangement. The saved memory may be used to store other information related to the reception and decoding of digital broadcast signals.

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