Memory efficient method and apparatus for sync detection

Television – Synchronization – Sync separation

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348530, 348526, 348464, 371 42, 380 28, H04N 510

Patent

active

054206405

ABSTRACT:
A receiver is provided for receiving a digital data stream over a communication path. The digital data is arranged as a sequence of frames, each frame including a plurality of lines of data. The beginning of each frame is indicated by a frame synchronization word; the beginning of each line is indicated by a horizontal synchronization byte. The data is interleaved by an encoder prior to transmission. The decoder contains circuitry for locating the horizontal and frame synchronization data and contains circuitry for deinterleaving the digital data. Both the synchronization locating circuitry and the deinterleaving circuitry require access to a memory, but not at the same time. Therefore, a single memory is used with the synchronization recovery circuitry and deinterleaving circuitry alternately addressing the memory.

REFERENCES:
patent: 4356566 (1982-10-01), Wada et al.
patent: 4394642 (1983-07-01), Currie et al.
patent: 4740962 (1988-04-01), Kish III
patent: 5008751 (1991-04-01), Wishermann

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