Memory efficient interleaving

Details Memory efficient interleaving Memory efficient interleaving

2007-01-23

2007-01-23

Williams, Howard L. (Department: 2819)

Coded data generation or conversion

Digital code to digital code converters

To or from interleaved format

C711S157000

Reexamination Certificate

active

10959281

ABSTRACT:
A method and system using a single interleaver at a either a receiving device or a transmitting device where a first symbol set is read from the single interleaver and concurrently with a second symbol set is written to the single interleaver, and a controller that synchronizes the reading of the first symbol set from the interleaver and the writing of the second symbol set to the interleaver so that a particular symbol of the second symbol set is only written to a location of the interleaver after a particular symbol of the first symbol set has been read from the location. The controller may switch between orders, e.g., row order and column order, of reading and/or writing symbols to the single interleaver when all of the symbols for a particular set of symbols associated with the single interleaver have been read, according to another embodiment.

REFERENCES:
patent: 6553517 (2003-04-01), Prasad
patent: 6598198 (2003-07-01), Furuta et al.
patent: 6625763 (2003-09-01), Boner
patent: 6748561 (2004-06-01), Prasad
patent: 6944727 (2005-09-01), Yokokawa
patent: 6964005 (2005-11-01), Hollums
patent: 2003/0149849 (2003-08-01), Kim et al.
patent: 2005/0050284 (2005-03-01), Lee

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