Memory efficient interlace apparatus and method as for a picture

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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358 22, H04N 5262, H04N 5450

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active

049874934

ABSTRACT:
A picture-in-a-picture television receiver includes a memory for holding samples representing a vertically and horizontally compressed image. The memory is divided into three parts, a main portion which holds one field of the compressed image and first and second crossover buffers, each of which hold one line of the compressed signal. Both upper and lower field types may be derived from each field of the auxiliary signal used to produce the compressed image. Sample values are stored into the memory such that an upper field of the compressed image is stored when an upper field of the main image is displayed and a lower field is stored when a lower field is displayed. When the address used to read samples from the memory overtakes the address used to write samples into the memory, the type of field derived from the auxiliary signal is switched and one line of samples is directed to one of the crossover buffers. During this time, the read address is changed to read samples from the other one of the crossover buffer. This apparatus reduces distortion in the compressed image caused by field misalignment between the main and auxiliary signals.

REFERENCES:
patent: 4249213 (1981-02-01), Imaide et al.
patent: 4267560 (1981-05-01), Ishikawa et al.
patent: 4623915 (1986-11-01), Bolger
patent: 4656516 (1987-04-01), Fling
patent: 4712130 (1987-12-01), Casey
patent: 4724487 (1988-02-01), Casey
patent: 4729028 (1988-03-01), Mick et al.
patent: 4750038 (1988-06-01), Welles et al.
patent: 4750039 (1988-06-01), Willis
patent: 4761686 (1988-08-01), Willis
patent: 4777531 (1988-10-01), Hakamada et al.
patent: 4796089 (1989-01-01), Imai et al.
patent: 4811103 (1989-03-01), Casey
patent: 4837626 (1989-06-01), Nishiyama et al.
patent: 4839728 (1989-06-01), Casey
patent: 4862269 (1989-08-01), Sonoda et al.
patent: 4918518 (1990-04-01), Phillips

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