Memory devices with selectable access type and methods using the

Details Memory devices with selectable access type and methods using the Memory devices with selectable access type and methods using the

1995-10-04

1997-08-05

Nelms, David C.

Static information storage and retrieval

Addressing

Plural blocks or banks

36523006, 36523009, G11C 800

Patent

active

056549326

ABSTRACT:
A memory 200 including an array 201 of rows and columns of memory cells. Row decoder circuitry 211 is provided for selecting in response to a row address a row in array 201 for access. Column decoder circuitry 205 is provided for selecting at least one location within a first group of columns along the selected row in array 201 in response to a column address. At least one shift register 207 is provided for allowing serial access to one of the cells within a second group of columns along the selected row.

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