Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2011-01-25
2011-01-25
Lam, David (Department: 2827)
Static information storage and retrieval
Addressing
Plural blocks or banks
C365S230020, C365S189020
Reexamination Certificate
active
07876639
ABSTRACT:
Apparatus and methods are disclosed, such as those involving a memory device. One such memory device includes a memory array including a sub-array that includes a first number of columns of memory cells, and one or more global input/output (I/O) lines shared by the first number of columns for data transmission. The memory device also includes one or more multiplexers/demultiplexers, wherein each of the multiplexers/demultiplexers is electrically coupled to one or more, but not all, of the global I/O lines. The memory device further includes a plurality of local I/O lines, each configured to provide a data path between one of the multiplexers/demultiplexers and one or more, but less than the first number, of the columns in the sub-array. This configuration allows local I/O line repairability with fewer redundant elements, and shorter physical local I/O lines, which translate to improved speed and die size reduction.
REFERENCES:
patent: 5732030 (1998-03-01), Dorney
patent: 5822268 (1998-10-01), Kirihata
patent: 6490208 (2002-12-01), Yoon
patent: 6522590 (2003-02-01), Matsui et al.
patent: 6724669 (2004-04-01), Bhatia
Knobbe Martens Olson & Bear LLP
Lam David
Micro)n Technology, Inc.
LandOfFree
Memory devices having redundant arrays for repair does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory devices having redundant arrays for repair, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory devices having redundant arrays for repair will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2629580