Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2008-12-03
2010-11-02
Tran, Michael T (Department: 2827)
Static information storage and retrieval
Floating gate
Particular connection
C365S185240
Reexamination Certificate
active
07826265
ABSTRACT:
A memory device includes a memory array including a plurality of cells. The cells are divided into a plurality of subsets. Each subset has at least one associated trim parameter. The trim parameter for each subset is stored in the memory array within the associated subset. Circuitry is operable to program at least a portion of a selected subset using the associated trim parameter. A method for operating a memory device includes storing at least one trim parameter for each of a plurality of subsets of a memory array in the memory device within each of the subsets. At least a portion of a selected subset is programmed based on the at least one trim parameter associated with the selected subset.
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Dorsey & Whitney LLP
Micro)n Technology, Inc.
Tran Michael T
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