Memory device with switching of data stream modes

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Details

3642548, 3642703, 3649542, 364238, 364DIG1, G06F 1200, G06F 110

Patent

active

055133347

ABSTRACT:
An I.sup.2 C bus-compatible, serial EEPROM device is used in applications involving storage and serial transmission of configuration and control information for an intelligent peripheral device with which the EEPROM device is associated, for communication on a bus to a host device adapted to control the peripheral device. The EEPROM device has a memory array for storing data representing the configuration and control information. Two modes of data transmission are supported by the EEPROM device, and are alternately and selectively established according to whether data stored in the EEPROM array is to be read only, by sequential output onto the bus, or the array is also to be allowed to be written to. The arrangement ultimately allows intelligent interaction between the host device and the peripheral device. A separate clock line supplements the usual clock line and data line of an I.sup.2 C bus to support the distinct and different modes, with clocking by the respective clock line for the established mode. A controlled multiplexer selectively connects the input clock according to a predetermined logic level transition on one of the two clock lines.

REFERENCES:
patent: 4713756 (1987-12-01), Mackiewicz
patent: 4841485 (1989-06-01), Prilik
patent: 4855994 (1989-08-01), Takeuchi
patent: 4962485 (1990-10-01), Kato
patent: 5053990 (1991-10-01), Kreifels
patent: 5070500 (1991-12-01), Horinouchi

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