Memory device with shared reference and method

Details Memory device with shared reference and method Memory device with shared reference and method

2006-04-25

2008-11-25

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read only systems

C365S063000, C365S189020, C365S189090, C365S230030

Reexamination Certificate

active

07457143

ABSTRACT:
A memory device has a first core memory array, a second core memory array, a third core memory array and a fourth core memory array, and a first common reference section for the first core memory array and the second core memory array, and a second common reference section for the third core memory array and the fourth core memory array. Another memory device with shared signals and a method is also provided.

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patent: 2001/0053107 (2001-12-01), Kohno
patent: 2004/0151045 (2004-08-01), Kanai
patent: WO 2006/024403 (2006-03-01), None
B.D. Yang, L.S. Kim, “A Low-Power ROM Using Charge Recycling and Charge Sharing Techniques”, IEEE Journal of Solid-State Circuits, vol. 38, No. 4, Apr. 2003, pp. 641-653.

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