Memory device with interconnected polysilicon layers and method

Details Memory device with interconnected polysilicon layers and method Memory device with interconnected polysilicon layers and method

1987-07-31

1988-09-27

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 49, 437 52, 437233, 357 235, 357 59, 365185, 156643, H01L 21265, H01L 2170, H01L 21469

Patent

active

047742020

ABSTRACT:
A memory device, based upon a field effect transistor having a floating gate is constructed for use in a silicon integrated circuit array of similar memory devices. The memory device includes only two polysilicon layers, a portion of each polysilicon layer being connected to each other through a via hole in an intervening silicon dioxide layer to form the floating gate.

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