Active solid-state devices (e.g. – transistors – solid-state diode – Voltage variable capacitance device – With specified housing or contact
Reexamination Certificate
2003-01-06
2004-07-13
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Voltage variable capacitance device
With specified housing or contact
C257S516000
Reexamination Certificate
active
06762482
ABSTRACT:
Pursuant to 35 U.S.C. §119(a)-(d), this application claims priority from Taiwanese application no. 091100227, filed on Jan. 10, 2002.
FIELD OF THE INVENTION
The present invention relates to semiconductor manufacture, and more particularly to a memory device with composite contact plug and a method for manufacturing the same.
BACKGROUND OF THE INVENTION
The contact between the capacitor storage node and cell device is critical in the integration of ferroelectric or high dielectric constant perovskite material in semiconductor memory devices. The electrode materials (such as Pt, Ru, Ir and conducting metal oxides) for capacitor storage node are generally used in combination with suitable barriers that block diffusion of the elements in the high dielectric constant films or in Si devices to prevent interaction between the components. Moreover, there are difficulties raised during process integration of high dielectric constant capacitors due to the fact that these electrode materials require a certain barrier layer at the interface with the poly-si plug, which connects the capacitor with the transistor. Generally, binary and ternary refractory metal nitrides (such as TiN, TiSiN, TaSiN, or TiAlN) are chosen to protect the storage electrode from reacting with Si during the high dielectric constant film deposition, high temperature annealing or insulating layer deposition, and to keep good electrical conductivity of the barrier after these process. However, simple stacks of barrier/electrode are prone to be oxidization during ferroelectric material deposition because of the exposure of the sidewall area to the oxidating atmosphere.
Metallic plugs improve the electrical conductivity of the contact plug, and therefore, there are various storage node electrode contact designs in high dielectric capacitors comprising metallic plugs, such as metal plug/TaAlN/SrRuO
3
Ru-plug/SrRuO
3
/BST/SrRuO
3
metal plug/Ru/Ta
2
O
5
/Ru and Ru-plug/Ru/Ta
2
O
5
/Ru.
Ru is a contact plug metal in the prior art. Recent studies (for example, reports in J. Electrochem. Soc. 146, 4189, 1999 and JJAP 37, L242, 1998) have disclosed that the Ru/poly-Si interface shows thermal stability by suppressing silicidation of Ru under appropriate conditions during Ru deposition. Therefore, the Ru plug prevents the deterioration between the metal plug and the underlying poly-Si plug or Si device if there is no intermediate layer between. As well, when conductive metal oxides are selected as electrode materials, the RuO
2
layer generated after high temperature process will not degrade the total capacitance of integrated ferroelectric or high dielectric constant capacitor, but the Al-rich oxide layer ,such as TiAlN barrier, will. Moreover, when Ru is selected as the material for a storage node capacitor, the same Ru plug as Ru storage node may improve the adhesion problems associated with other plug metals and reduces process steps and cost.
The transistor characteristics are degraded because of the contamination of metallic plug/electrode or elements of perovskite metal oxide electrode. One purpose of the barrier layer, such as TiN/Ti or SiN, is to shield metal contamination. However, viewing from the bit line direction in
FIG. 1
, metallic or metal oxide storage node
18
contacts the underlying insulating layer
12
directly (as arrow A shows) and there is no barrier layer between. Metal contamination diffuses through the oxide layer. Moreover, the interface at which barrier layer
16
contacts storage electrode
18
(as arrow B shows) is the weak point for leakage and reliability and easily oxidized during the deposition of high dielectric film and high temperature annealing process. The oxidation raises the contact resistance. Furthermore, because of the relevant feature size of 0.3 &mgr;m and beyond, high aspect ratio contact hole makes it difficult to fill gaps of CVD plug Ru.
Therefore, there is a need to improve the interface between the storage electrode and the contact plug in a memory device.
SUMMARY OF THE INVENTION
One object of the present invention provides a memory device with composite contact plug and a method for manufacturing the same to avoid barrier layer oxidation.
Another object of the present invention provides a memory device with composite contact plug and method for manufacturing the same to avoid metal contamination caused by storage electrode in contact with dielectric layer.
Still another object of the present invention provides a memory device with composite contact plug and method for manufacturing the same to fill gap of metal plug in high aspect ratio contact hole.
The invention achieves the above-identified objects by etching back the barrier layer to the surface below the contact hole before metal plug (such as Ru plug) deposition. The recessed barrier layer prevents the capacitor dielectric layer form oxidization during deposition or in the following thermal process. The leakage and unreliable properties caused by the barrier layer in contact with storage electrode are then solved.
The invention achieves the above-identified objects by filling about half of the contact hole in depth with barrier layer to reduce aspect ratio and make it easier to form the metal plug.
The invention achieves the above-identified objects by forming a diffusion barrier layer between the storage electrode and the insulating layer beneath to prevent metal contamination from the quality reduction of transistor.
REFERENCES:
patent: 5313089 (1994-05-01), Jones, Jr.
patent: 6235603 (2001-05-01), Melnick et al.
Fukuzumi Yoshiaki
Liu Wen-Chung
Sheu Bor-Ru
Birch & Stewart Kolasch & Birch, LLP
Nelms David
Nguyen Thinh T.
Winbond Electronics Corporation
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