Patent
1989-10-25
1991-10-22
James, Andrew J.
357 237, 357 4, 357 42, 357 54, H01L 2968, H01L 2701, H01L 2713, H01L 2978
Patent
active
050600346
ABSTRACT:
A memory device includes a memory element composed of a first thin film transistor having a memory function, and a select element composed of a second thin film transistor for selecting the memory element. A gate insulation film of the first thin film transistor has a charge storage function. A gate insulation film of the second thin film transistor does not have any charge storage function. If a plurality of the memory devices are arranged in matrix form, this configuration can be used as E.sup.2 PROM. By forming the first and second thin film transistors simultaneously, it is possible to form the first and second thin film transistors easily in the simple manufacturing steps.
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Matsumoto Hiroshi
Shimizu Hideaki
Wakai Haruo
Yamada Hiroyasu
Yamamura Nobuyuki
Casio Computer Co. Ltd.
James Andrew J.
Kim Daniel Y. J.
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