Memory device power distribution in electronic systems

Details Memory device power distribution in electronic systems Memory device power distribution in electronic systems

2005-10-04

2005-10-04

Pham, Hoai (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

C257S773000, C257S784000

Reexamination Certificate

active

06952045

ABSTRACT:
Electronic systems including memory devices arranged to be mounted in a memory package with the major axis of the memory chip aligned substantially parallel with the major axis of its memory package. Memory chips include a first power input chip bond pad in each of at least three quadrants of the memory chip. Memory chips include a second power input chip bond pad in each of at least three quadrants of the memory chip. The chip bond pads are interposed between memory banks of the memory device and the sides of the memory chip containing the memory device. Memory assemblies include memory chips having chip bond pads on both sides of the memory chip shorted to each other by a single lead of a leadframe. Memory chips of various embodiments contain memory devices having banks of non-volatile flash memory cells whose access commands are synchronized to a system clock.

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