Memory device having repeaters

Details Memory device having repeaters Memory device having repeaters

2006-05-30

2006-05-30

Lam, David (Department: 2827)

Static information storage and retrieval

Addressing

Including particular address buffer or latch circuit...

C365S230060, C365S230030

Reexamination Certificate

active

07054220

ABSTRACT:
Disclosed is a memory device having repeaters capable of preventing an expected signal delay and a signal distortion caused by a long transmission length of a long address signal and a long control signal. The memory device comprises: a plurality of banks; an address pad; an address driver for transmitting an address signal, which is inputted through the address pad, into each of the banks through address signal lines; a control pad; a control driver for transmitting a control signal, which is inputted through the control pad, into each of the banks through control signal lines; and repeaters arranged on the address signal lines and/or the control signal lines.

REFERENCES:
patent: 5128897 (1992-07-01), McClure
patent: 5237536 (1993-08-01), Ohtsuki
patent: 5737276 (1998-04-01), Shin et al.
patent: 11 353870 (1999-12-01), None

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