Memory device having isolation trenches with different...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S211000

Reexamination Certificate

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06969686

ABSTRACT:
A method for manufacturing a memory device utilizes multi-etching processes to respectively construct isolation trenches in a memory substrate that has a memory array area and a peripheral circuit region, wherein the depth of the trenches in the peripheral circuit region is deeper into the memory substrate than the depth of the trenches in the memory array area. Therefore, possible current leakage caused from the high operating voltage is effectively mitigated, and the performance of the memory device is increased.

REFERENCES:
patent: 6008084 (1999-12-01), Sung
patent: 6436751 (2002-08-01), Liou et al.
patent: 6624022 (2003-09-01), Hurley et al.
patent: 6690051 (2004-02-01), Hurley et al.
patent: 6720214 (2004-04-01), Ono

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