Memory device having improved periphery and core isolation

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S700000

Reexamination Certificate

active

07078314

ABSTRACT:
The present invention discloses a memory device having an improved periphery isolation region and core isolation region. A first trench is formed in a core region. Substrate material bordering the first trench is then oxidized to form a first liner. The first liner is then removed. A second trench is then formed in a periphery region. A second oxidation is then performed such that a second liner is formed from the substrate material bordering the first and second trenches. A dielectric trench fill having substantially uniform density is then deposited in the first and second trenches.

REFERENCES:
patent: 6265292 (2001-07-01), Parat et al.
patent: 6406976 (2002-06-01), Singh et al.
patent: 6624022 (2003-09-01), Hurley et al.

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