Memory device having concurrent write and read cycles and...

Details Memory device having concurrent write and read cycles and... Memory device having concurrent write and read cycles and...

2006-11-20

2009-11-24

Phung, Anh (Department: 2824)

Static information storage and retrieval

Powering

C365S189140, C365S233100, C365S189050

Reexamination Certificate

active

07623404

ABSTRACT:
A memory device includes a latch having an input to receive a bit value, an input to receive a clock signal, and an output to provide a latched bit value based on the clock signal. The memory device further includes a bit cell including a storage component, and a write row driver configured to enable write access to the bit cell to store the latched bit value at the storage component for a first phase and a second phase of a cycle of the clock signal, the second phase following the first phase, and a read row driver configured to disable read access to the bit cell for the first phase of the cycle of the clock signal and to enable read access to the bit cell for the second phase of the cycle of the clock signal.

REFERENCES:
patent: 5610872 (1997-03-01), Toda
patent: 5615164 (1997-03-01), Kirihata et al.
patent: 6026048 (2000-02-01), Wada
patent: 6032220 (2000-02-01), Martin et al.
patent: 6757799 (2004-06-01), Martin et al.
patent: 2001/0048630 (2001-12-01), Fujimoto et al.
patent: 2004/0004901 (2004-01-01), Gieseke et al.
patent: 2004/0158688 (2004-08-01), Rentschler et al.
patent: 2005/0286327 (2005-12-01), Ramaraju et al.
Sit et al., “A Four-Phase Handshaking Asynchronous Static RAM Design for Self-Timed Systems,” IEEE Journal of Solid-State Circuits, vol. 34, No. 1, Jan. 1999, pp. 90-96.

Affiliated with

Also associated with

Rating

Memory device having concurrent write and read cycles and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory device having concurrent write and read cycles and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory device having concurrent write and read cycles and... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4086701