Memory device having components for transmitting and...

Details Memory device having components for transmitting and... Memory device having components for transmitting and...

2007-05-08

2007-05-08

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S189050, C365S189011, C365S194000

Reexamination Certificate

active

11046160

ABSTRACT:
One embodiment of the present invention provides a memory device comprising an array of memory cells, a control logic for writing data to and reading data from the array of memory cells, the control logic comprising a first interface, an input/output section for exchanging data, address and control signals with a circuit external to the memory device, the input/output section comprising a second interface for sending signals to and receiving signals from the first interface of the control logic, and a synchronizing facility connected to the first interface of the control logic and to the second interface of the input/output section for synchronizing the first interface of the control logic and the second interface of the input/output section.

REFERENCES:
patent: 6636445 (2003-10-01), Ohshima et al.
patent: 2002/0041536 (2002-04-01), Tomita

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