Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2006-01-31
2006-01-31
Nguyen, VanThu (Department: 2824)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S233100, C365S236000, C365S239000
Reexamination Certificate
active
06992948
ABSTRACT:
A semiconductor integrated circuit device is provided in which current consumption is reduced at the time a data access by consecutive addresses is performed to a ROM circuit or a RAM circuit. The semiconductor integrated circuit device incorporates a ROM circuit1and a control circuit68for controlling a data access to the ROM circuit, wherein an address generation circuit69included in the control circuit divides a clock to be input, performs a phase adjustment by sampling the divided clock and generates an address signal of several bits in which only a value of 1 bit changes in a sequential order when a data access by consecutive addresses is performed on the ROM circuit.
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Hamre Schumann Mueller & Larson P.C.
Nguyen Van-Thu
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