Memory device having a virtual ground array and methods...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185220

Reexamination Certificate

active

11273120

ABSTRACT:
A program verification method for a memory device having a virtual array including a plurality of memory cells determines if leakage current passes through one or more neighboring memory cells to the programmed memory cell. The programmed memory cell is verified based on a first threshold state if leakage current is determined to pass through one or more neighboring memory cells. The programmed memory cell is verified based on a second threshold state if the leakage current is not determined to pass through one or more neighboring memory cells.

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patent: 2004/0246784 (2004-12-01), Yamada
patent: 2005/0079675 (2005-04-01), Ilkbahar et al.
patent: 2005/0270849 (2005-12-01), Lue
patent: 2005/0286299 (2005-12-01), Tomita et al.

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