Memory device having a semiconducting polymer film

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S237000, C257S295000, C257S544000, C365S145000, C365S146000

Reexamination Certificate

active

06828685

ABSTRACT:

BACKGROUND
Description of the Art
Over the past few years, the demand for ever cheaper and lighter weight portable electronic devices has led to a growing need to manufacture durable, lightweight, and low cost electronic circuits including high density memory chips. Solid state memory devices, typically, have read write speeds on the order of nanoseconds, however, storage capacities of only a few Megabyte are typically achieved. On the other hand, mass storage devices, which usually have a rotating medium, have the capability of storing a few Gigabytes of data; however, they have read write speeds of the order of only milliseconds.
The ability to manufacture high capacity storage systems is typically constrained by the need to utilize movable or rotating parts, which is a relatively slow process compared to electronic circuit technology. In addition, reliability is an additional problem, in order to decrease the read write times the movable or rotating parts tend to be utilized at as highest speed as possible. Further, if the electronic device is used in a portable application the shock resistance of the system is typically a limitation. Power consumption, overall weight and size, and cost are also factors that limit storage systems.
The ability to fabricate solid-state memory circuits is typically constrained by the need to utilize silicon-based semiconductors and processing. Typically, silicon based memory devices involve complex architectures on single crystal semiconductor substrates, which results in higher cost. In addition, such complex architecture, typically, result in a reduction in the number of logic cells per unit area of the semiconductor substrate, leading to a reduction in the data storage density for a given chip size. Further, currently the fabrication of semiconducting circuits on polymer substrates, especially on flexible polymer substrates, is hindered by the typical harsh processing conditions for silicon-based devices such as high temperatures. Most polymer substrates have a relatively low melting or degradation temperature when compared to the deposition or annealing temperatures utilized in semiconductor processing. Thus, the semiconductor circuit elements are typically fabricated on semiconductor substrates such as single crystal silicon, and then separately mounted on the polymer substrate, requiring further interconnections, processing and cost.
One methodology utilized to get around the need for wafer level processing is the use of amorphous silicon-based thin film transistors (TFTs). However, this technology generally requires processing temperatures in the range of 300° C. to 400° C. that typically results in the melting or severe degradation of most polymer substrates.
There are a number of other problems in fabricating semiconducting circuits on polymer substrates. In general, only a limited number of polymers, such as polyimides, are available that can withstand the temperatures utilized in fabricating silicon semiconducting circuits. In addition, compatibility can be an issue; for example the difference in thermal expansion between silicon and polymers is large, typically resulting in thermal stress that can affect device performance. Under some conditions it can lead to delamination of the silicon from the polymer substrate. Further, the deposition of silicon typically requires sophisticated and expensive equipment that requires a vacuum and is optimized for deposition on wafers. These problems render impractical the manufacture of durable, lightweight, and low cost electronic memory devices.


REFERENCES:
patent: 4803402 (1989-02-01), Raber et al.
patent: 5060191 (1991-10-01), Nagasaki et al.
patent: 6212093 (2001-04-01), Lindsey
patent: 6272038 (2001-08-01), Clausen et al.
patent: 6344662 (2002-02-01), Dimitrakopoulos et al.
patent: 6352854 (2002-03-01), Nova et al.
patent: 6498744 (2002-12-01), Gudesen et al.
patent: 6541869 (2003-04-01), Gudesen et al.
patent: 6552409 (2003-04-01), Taussig et al.
patent: 6670659 (2003-12-01), Gudesen et al.
patent: 2001/0054709 (2001-12-01), Heath, et al.
patent: 1179863 (2002-02-01), None
patent: 1265287 (2002-12-01), None
patent: WO9730445 (1997-08-01), None
patent: WO0127972 (2001-04-01), None
“Transient space-charge-limited current pulse shapes in molecularly doped polymers”by DM Goldie in “J. Phys. D.: Appl. Phys.32 (1999) 3058-3067” Printed in the UK PH:S0022-3727(99)03831-0 pp. 3058-3067
“The estimation of trap-free space-charge-limited current magnitudes in molecularly doped polymers” by D.M. Goldie, A.A.W. Macartney, R.A.G. Gibson & R.S. Gairns from ‘Philosophical Magazine B’, 1997, vol. 75, No. 4, pp. 553-565.
“Inter-layer mixing effect on the transport properties of a dual-layer organic photoreceptor interface” by A.A.W. Macartney, D.M. Goldie, R.A.G. Gibson & R.S. Gairnsfrom ‘Synthetic Metals’ 67 (1994) pp. 201-205.
“Nanoimprint lithography: challenges and prospects” by S Zankovych, T Hoffman, J Seekamp, J-U Bruch and CM Sotomayor Torres from Institute of Physics Publishing Nanotechnology 12 (2001) pp. 91-95.
“Multilevel nanoimprint lithography with submicron alignment over 4 in. Si Wafer” by Wei Zhang and Stephen Y. Chou from ‘Applied Physics Letters’ vol. 79, No. 6 Aug. 6, 2001; pp. 845-847.
“Direct three-dimensional patterning using nanoimprint lithography” by Mingtao Li, Lei Chen and Stephen Y. Chou from ‘2001 American Institute of Physics’ downloaded Apr. 29, 2002; pp. 3322-3324.
“Product information Resist mr-1 9000 series” from ‘Nanoimprint lithography’ printed from the web url http://www.microresist.de/prod_info_mri9000.htm on Apr. 29, 2002; 5 pages.
“Directed Assembly of One-Dimensional Nanostructures into Functional Networds” by Yu Huang, Xiangfeng Duan, Qingqiao Wei and Charles M. Lieber from ‘Science’ vol 291, Jan. 26, 2001 pp. 630-633.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Memory device having a semiconducting polymer film does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory device having a semiconducting polymer film, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory device having a semiconducting polymer film will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3284864

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.