Memory device having a power supply-independent low power consum

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518518, 3651852, 365203, 327 56, G11C 1606

Patent

active

058286039

ABSTRACT:
The present invention relates to a bit line clamping scheme for non-volatile memories. The bit line voltage is maintained at a desired voltage level so as to avoid read disturb effects, while being independent of power supply variations and consuming virtually no power. The invention makes practical memory devices which are designed for both high voltage (5 volt) operation and low voltage (3.3 and 2.5 volt) operation.

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