Memory device having a minimum number of pins

Details Memory device having a minimum number of pins Memory device having a minimum number of pins

1978-04-11

1979-04-03

Fears, Terrell W.

Static information storage and retrieval

Powering

365191, 365229, G11C 1300

Patent

active

041480996

ABSTRACT:
A circuit for reducing the number of external pins or terminals on a memory device includes a counter circuit which periodically causes the signal on a first external pin to be provided to the power terminal of an internal power supply within the memory device and, at the same time, causes the ground level signal on a second external pin to be provided to the ground terminal of the internal power supply. At other times during the receipt of signals on the two external pins, the signal on the first pin provides both memory select and clocking functions and the signal on the second pin provides memory mode select, address, and data input and output functions.

REFERENCES:
patent: 3786277 (1974-01-01), Bosse
patent: 3851221 (1974-11-01), Beaulieu
patent: 3975714 (1976-08-01), Weber et al.

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