Memory device composed of a plurality of memory chips in a...

Details Memory device composed of a plurality of memory chips in a... Memory device composed of a plurality of memory chips in a...

2005-09-27

2005-09-27

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Format or disposition of elements

C365S063000

Reexamination Certificate

active

06950324

ABSTRACT:
The memory device includes a plurality of memory chips of a certain capacity assembled in a single package and sharing input/output pins, the memories being selectable and singularly enabled one at the time by appropriate external commands coherently with the currently addressed memory location. The device uses only one external enable/disable logic command applied through a single dedicated pin. Each of the memory chips has a number of additional input/output pads equal to 2*n, where 2nis the number of memory chips contained in the device, and a dedicated circuit that generates an internal enable/disable command, as a function of logic inputs corresponding to the logic states of the additional pads and the external enable/disable command.

REFERENCES:
patent: 5524231 (1996-06-01), Brown
patent: 6768660 (2004-07-01), Kong et al.

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