Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2009-05-26
2011-12-06
Hoang, Huan (Department: 2827)
Static information storage and retrieval
Floating gate
Multiple values
C365S185180, C257S311000
Reexamination Certificate
active
08072803
ABSTRACT:
The memory device is described, which includes a substrate, a conductive layer, a charge storage layer, a plurality of first doped regions and a plurality of second doped regions. The substrate has a plurality of trenches formed therein. The conductive layer is disposed on the substrate and fills the trenches. The charge storage layer is disposed between the substrate and the conductive layer. The first doped regions are configured in the substrate adjacent to both sides of an upper portion of each trench, respectively. The first doped regions between the neighbouring trenches are separated from each other. The second doped regions are configured in the substrate under bottoms of the trenches, respectively. The second doped regions and the first doped regions are separated from each other, such that each memory cell includes six physical bits.
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Chang Yao-Wen
Chen Po-Chou
Lu Tao-Cheng
Wu Guan-Wei
Yang I-Chen
Hoang Huan
J.C. Patents
MACRONIX International Co. Ltd.
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