Memory device and method having programmable address...

Details Memory device and method having programmable address... Memory device and method having programmable address...

2006-12-19

2006-12-19

Mai, Son (Department: 2827)

Static information storage and retrieval

Addressing

Multiplexing

C362S189000, C362S230000

Reexamination Certificate

active

07151709

ABSTRACT:
A memory device includes a configurable address register having a first set of input buffers coupled to a first set on address bus terminals and a second set of input buffers coupled to a second set of address bus terminals. In a first addressing configuration, address signals are simultaneously applied to the address bus terminals in the first and second sets, and they are simultaneously stored in respective address registers. In a second addressing configuration, a plurality of sets of address signals are sequentially applied to the address bus terminals in only the first set of address bus terminals. Each set of address signals is then stored in a different address register.

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