Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2007-10-16
2007-10-16
Lam, David (Department: 2827)
Static information storage and retrieval
Addressing
Plural blocks or banks
C365S230020, C365S189020, C365S189011
Reexamination Certificate
active
11190270
ABSTRACT:
A dynamic random access memory (“DRAM”) device includes a pair of internal address buses that are selectively coupled to an external address bus by an address multiplexer, and a pair of internal data buses that are selectively coupled to an external data bus by a data multiplexer. The DRAM device also includes a bank multiplexer for each bank of memory cells that selectively couples one of the internal address buses and one of the internal data buses to the respective bank of memory cells. Select signals generated by a command decoder cause the multiplexers to select alternate internal address and data buses responsive to each memory command received by the command decoder.
REFERENCES:
patent: 4266270 (1981-05-01), Daniels et al.
patent: 4309754 (1982-01-01), Dinwiddie, Jr.
patent: 4360891 (1982-11-01), Branigin et al.
patent: 4462029 (1984-07-01), Neumann et al.
patent: 4837785 (1989-06-01), McAlpine
patent: 5075892 (1991-12-01), Choy
patent: 5243699 (1993-09-01), Nickolls et al.
patent: 5307506 (1994-04-01), Colwell et al.
patent: 5414866 (1995-05-01), Ohmae
patent: 5416743 (1995-05-01), Allan et al.
patent: 5490253 (1996-02-01), Laha et al.
patent: 5631865 (1997-05-01), Iwase et al.
patent: 5650967 (1997-07-01), Seibert
patent: 5668956 (1997-09-01), Okazawa et al.
patent: 5715025 (1998-02-01), Ogurtsov et al.
patent: 5751999 (1998-05-01), Suzuki
patent: 5822261 (1998-10-01), Suh
patent: 5889971 (1999-03-01), Okazawa et al.
patent: 6006302 (1999-12-01), Okazawa et al.
patent: 6098136 (2000-08-01), Okazawa et al.
patent: 6195296 (2001-02-01), Cheol
patent: 6333890 (2001-12-01), Niimi et al.
patent: 6334164 (2001-12-01), Okazawa et al.
patent: 6343035 (2002-01-01), Kubo et al.
patent: 6366503 (2002-04-01), Sonoda
patent: 6373777 (2002-04-01), Suzuki
patent: 6462997 (2002-10-01), Sugamoto et al.
patent: 6510097 (2003-01-01), Fukuyama
patent: 6615341 (2003-09-01), Sih et al.
patent: 6625684 (2003-09-01), Casey et al.
patent: 6650582 (2003-11-01), Matsumoto et al.
patent: 6744657 (2004-06-01), Agata
patent: 6772262 (2004-08-01), Park et al.
patent: 6789174 (2004-09-01), Konishi et al.
patent: 6798711 (2004-09-01), Bell et al.
patent: 6810461 (2004-10-01), Okazawa et al.
patent: 6854036 (2005-02-01), Bosisio et al.
patent: 6941414 (2005-09-01), Hsu et al.
patent: 6961264 (2005-11-01), Tsuchida
patent: 2001/0003836 (2001-06-01), Maclellan et al.
patent: 2002/0049890 (2002-04-01), Bosisio et al.
patent: 2002/0062414 (2002-05-01), Hofmann et al.
patent: 2002/0065972 (2002-05-01), Okazawa et al.
patent: 2002/0138710 (2002-09-01), Sih et al.
patent: 2002/0163369 (2002-11-01), Peller et al.
patent: 2003/0105899 (2003-06-01), Rosenbluth et al.
patent: 2004/0037133 (2004-02-01), Park et al.
patent: 2004/0158362 (2004-08-01), Fuehrer et al.
patent: 2004/0168007 (2004-08-01), Okazawa et al.
patent: 2004/0260859 (2004-12-01), Park et al.
patent: 2005/0105379 (2005-05-01), Mizuhashi
patent: 2005/0117390 (2005-06-01), Tsuchida
patent: 2005/0125585 (2005-06-01), Okazawa et al.
patent: 2006/0190688 (2006-08-01), Van Eijndhoven et al.
Cullum James
Wright Jeffrey
Dorsey & Whitney LLP
Lam David
Micro)n Technology, Inc.
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