Memory device and method having charge level assignments...

Static information storage and retrieval – Floating gate – Disturbance control

Reexamination Certificate

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C365S185240, C365S185030, C365S185170, C365S185120

Reexamination Certificate

active

08064251

ABSTRACT:
A non-volatile memory device programs memory cells in each row in a manner that minimizes the coupling of spurious signals. A control logic unit programs the cells in a row using a set of bit state assignments chosen by evaluating data that are to be written to the cells in the row. The control logic unit performs this evaluation by determining the number of cells in the row that will be programmed to each of a plurality of bit states corresponding to the write data. The control logic unit then selects a set of bit state assignments that will cause the programming level assigned to each bit state to be inversely proportional to the number of memory cells in the row that are programmed with the bit state. The selected set of bit states is then used to program the memory cells in the row.

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