Memory device and a method of forming a memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C257S695000, C257S677000, C257SE21511, C257SE23001

Reexamination Certificate

active

07378727

ABSTRACT:
A memory device includes a semiconductor substrate having a surface, a plurality of first and second conductive lines, a plurality of memory cells, and a plurality of landing pads. Each of the first conductive lines has a line width wb and two neighboring ones of the first conductive lines having a distance bs from each other. Each of the second conductive lines has a line width wl and two neighboring ones of the second conductive lines having a distance ws from each other. Each memory cell is accessible by addressing corresponding ones of said first and second conductive lines. Each of the landing pads are made of a conductive material and are connected with a corresponding one of said second conductive lines. Each of said landing pads has a width wp and length lp and the line width wl of each of the second conductive lines is larger than the distance ws and the width wp of each of the landing pads is larger than the line width wl and the length lp of each of the landing pads is larger than the line width wl.

REFERENCES:
patent: 4630355 (1986-12-01), Johnson
patent: 6927119 (2005-08-01), Lee et al.
patent: 2002/0142555 (2002-10-01), Cha
patent: 2003/0025149 (2003-02-01), Kanai

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