Memory device accessible with different communication protocols

Details Memory device accessible with different communication protocols Memory device accessible with different communication protocols

2005-08-09

2005-08-09

Elms, Richard (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S230060, C365S189070

Reexamination Certificate

active

06927991

ABSTRACT:
A memory device includes a multi-protocol interface having at least two interfaces. Each interface decodes a respective communication protocol when enabled by a respective interface enable signal. The memory device further includes an automatic selection circuit for selecting one of the interfaces corresponding to a received communication protocol. The automatic selection circuit compares bits transmitted during a preamble of a received communication protocol cycle with pre-established bit patterns corresponding to preambles of the communication protocols associated with the at least two interfaces, and generates an enable signal for one of the interfaces based upon the comparison.

REFERENCES:
patent: 4096567 (1978-06-01), Millard et al.
patent: 5321819 (1994-06-01), Szczepanek
patent: 6122216 (2000-09-01), Dykes

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